From 8aa3d340f5612327861f4465550fc8eb39a54d4a Mon Sep 17 00:00:00 2001
From: Andy Whitcroft <apw@canonical.com>
Date: Fri, 26 Jan 2018 12:36:50 +0000
Subject: [PATCH 07/89] Revert "x86/cpu/AMD: Remove now unused definition of
 MFENCE_RDTSC feature"

CVE-2017-5753 (revert embargoed)
CVE-2017-5715 (revert embargoed)

This reverts commit 6e6c998937329e9d13d4b239233cd058e8a7730f.

Signed-off-by: Andy Whitcroft <apw@canonical.com>
---
 arch/x86/include/asm/barrier.h | 3 ++-
 arch/x86/include/asm/msr.h     | 3 ++-
 arch/x86/net/bpf_jit_comp.c    | 3 +++
 3 files changed, 7 insertions(+), 2 deletions(-)

diff --git a/arch/x86/include/asm/barrier.h b/arch/x86/include/asm/barrier.h
index d00432579444..aae78054cae2 100644
--- a/arch/x86/include/asm/barrier.h
+++ b/arch/x86/include/asm/barrier.h
@@ -23,7 +23,8 @@
 #define wmb()	asm volatile("sfence" ::: "memory")
 #endif
 
-#define gmb() alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
+#define gmb() alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC, \
+				       "lfence", X86_FEATURE_LFENCE_RDTSC);
 
 #ifdef CONFIG_X86_PPRO_FENCE
 #define dma_rmb()	rmb()
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h
index 3139098269f6..898dba2e2e2c 100644
--- a/arch/x86/include/asm/msr.h
+++ b/arch/x86/include/asm/msr.h
@@ -213,7 +213,8 @@ static __always_inline unsigned long long rdtsc_ordered(void)
 	 * that some other imaginary CPU is updating continuously with a
 	 * time stamp.
 	 */
-	alternative("", "lfence", X86_FEATURE_LFENCE_RDTSC);
+	alternative_2("", "mfence", X86_FEATURE_MFENCE_RDTSC,
+			  "lfence", X86_FEATURE_LFENCE_RDTSC);
 	return rdtsc();
 }
 
diff --git a/arch/x86/net/bpf_jit_comp.c b/arch/x86/net/bpf_jit_comp.c
index e20e304320f9..879dbfefb66d 100644
--- a/arch/x86/net/bpf_jit_comp.c
+++ b/arch/x86/net/bpf_jit_comp.c
@@ -116,6 +116,9 @@ static void emit_memory_barrier(u8 **pprog)
 		if (boot_cpu_has(X86_FEATURE_LFENCE_RDTSC))
 			/* x86 LFENCE opcode 0F AE E8 */
 			EMIT3(0x0f, 0xae, 0xe8);
+		else if (boot_cpu_has(X86_FEATURE_MFENCE_RDTSC))
+			/* AMD MFENCE opcode 0F AE F0 */
+			EMIT3(0x0f, 0xae, 0xf0);
 		else
 			/* we should never end up here,
 			 * but if we do, better not to emit anything*/
-- 
2.15.1

